Phase 1: APB Spec & Environment Setup | APB on EDA Playground APB × EDA Playground Series Home Phase 2 → Phase 1 / 5 Series AMBA 3 APB on EDA Playground Phase 1 — Spec & Environment Setup Week 1–2 (May 12–22) IHI 0024B §4 · §3 apb_pkg + apb_if + 6 SVA Before …
While classic Verilog was limited to basic fixed-size arrays, SystemVerilog introduces a powerful and versatile set of storage types. Whether you need to model a massive sparse memory or build a flexible testbench scoreboard, choosing the right data structure will make your code faster, more efficient, and easier to write. Here is a breakdown of …
While Verilog-1995 provided basic data types like the four-state reg and wire, SystemVerilog introduces a rich set of enhanced data structures specifically designed to help both hardware designers and verification engineers write more abstract, readable, and robust code. Here is a breakdown of the essential built-in and custom data types you need to know when …
SystemVerilog Data Types: Built-in, Custom, and Beyond Read More »
When moving to a modern constrained-random verification methodology, managing how your testbench executes and measuring its success are critical to a project’s success. Without structure, tests can wander aimlessly; without measurement, you never know when you are truly done. Here is a breakdown of how to structure your simulation phases, leverage functional coverage, and evaluate …
Simulation & Performance: Environment Phases, Coverage, and Testbench Efficiency Read More »
To thoroughly verify a complex design, you cannot rely on ad-hoc connections and tangled code. A modern verification environment requires a structured, well-planned architecture. The fundamental purpose of any testbench is to determine the correctness of the Design Under Test (DUT). Regardless of the specific design, every testbench must accomplish five basic functions: generate stimulus, …
Architecting a SystemVerilog Testbench: Layers, Components, and Code Reuse Read More »
As hardware designs grow increasingly complex, verifying that a design accurately represents its specification becomes a massive challenge. Choosing the right testing strategy is essential for finding bugs efficiently and hitting your coverage goals. Two primary approaches dominate the verification field: traditional directed testing and modern constrained-random stimulus. Here is a breakdown of how they …
Testing Strategies: Directed Testing vs. Constrained-Random Stimulus Read More »
Imagine you are given the job of building a house. Do you start by picking out paint colors or choosing bathroom fixtures? Of course not! You first need to consider how the owners will use the space and what their budget is so you can decide what type of house to build. The same logic …
Introduction to Verification: Process, Plans, and Methodology Basics Read More »
Boolean Algebra – Digital Electronics 1.2 Boolean Algebra Boolean Algebra is a branch of mathematics that deals with logical operations on binary variables. These variables take only two values: 0 (False) and 1 (True). It is also known as Binary Algebra, Two-Valued Logic, or Logical Algebra. Boolean Algebra was introduced by George Boole in 1847. …
1. Introduction Digital electronics is a branch of electronics that deals with digital systems, where data or information is processed in the form of binary numbers (0s and 1s). In contrast, analog electronics works with systems that process information using continuous signals, where values can vary smoothly over time. Understanding the difference between these two …
1.0 PCIe Layered Architecture and the Physical Layer The PCI Express architecture is conceptually partitioned into three layers: the Transaction Layer, the Data Link Layer, and the Physical Layer. This layered design allows for modularity, enabling the Physical Layer to be adapted for higher data rates with minimal impact on the upper layers. 1.1 Role …
S 0.0: PCI Express Physical Layer Architecture and Operation Read More »
